Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

7-2 Vol. 1

PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS

• Signed and unsigned byte, word, doubleword integers

• Near and far pointers

• Bit fields

• BCD integers

7.2 PROGRAMMING ENVIRONMENT FOR GP

INSTRUCTIONS IN 64-BIT MODE

The programming environment for the general-purpose instructions in 64-bit mode is

similar to that described in Section 7.1.

• General-purpose registers — In 64-bit mode, sixteen general-purpose

registers available. These include the eight GPRs described in Section 7.1 and

eight new GPRs (R8D-R15D). R8D-R15D are available by using a REX prefix. All

sixteen GPRs can be promoted to 64 bits. The 64-bit registers are referenced as

RAX, RBX, RCX, RDX, RBP, RSI, RDI, RSP and R8-R15 (see Section 3.4.1.1,

“General-Purpose Registers in 64-Bit Mode”). Promotion to 64-bit operand

requires REX prefix encodings.

• Segment registers — In 64-bit mode, segmentation is available but it is set up

uniquely (see Section 3.4.2.1, “Segment Registers in 64-Bit Mode”).

• Flags and Status register — When the processor is running in 64-bit mode,

EFLAGS becomes the 64-bit RFLAGS register (see Section 3.4.3, “EFLAGS

• Instruction Pointer register — In 64-bit mode, the EIP register becomes the

64-bit RIP register (see Section 3.5.1, “Instruction Pointer in 64-Bit Mode”).

General-purpose instructions operate on the following data types in 64-bit mode. The

width of valid data types is dependent on default operand size, address size, or a

prefix that overrides the default size:

• Bytes, words, doublewords, quadwords

• Signed and unsigned byte, word, doubleword, quadword integers

• Near and far pointers

• Bit fields