Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 7-23
PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS
The destination operand specifies a relative address (a signed offset with respect to
the address in the EIP register) that points to an instruction in the current code
segment. The Jcc instructions do not support far transfers; however, far transfers can
be accomplished with a combination of a Jcc and a JMP instruction (see “Jcc—Jump if
Condition Is Met” in Chapter 3, “Instruction Set Reference, A-M,” of the Intel® 64
and IA-32 Architectures Software Developer’s Manual, Volume 2A).
Table 7-4 shows the mnemonics for the Jcc instructions and the conditions being
tested for each instruction. The condition code mnemonics are appended to the letter
“J” to form the mnemonic for a Jcc instruction. The instructions are divided into two
groups: unsigned and signed conditional jumps. These groups correspond to the
results of operations performed on unsigned and signed integers respectively. Those
instructions listed as pairs (for example, JA/JNBE) are alternate names for the same
instruction. Assemblers provide alternate names to make it easier to read program
listings.
The JCXZ and JECXZ instructions test the CX and ECX registers, respectively, instead
of one or more status flags. See “Jump if zero instructions” on page 7-24 for more
information about these instructions.
Loop instructions — The LOOP, LOOPE (loop while equal), LOOPZ (loop while zero),
LOOPNE (loop while not equal), and LOOPNZ (loop while not zero) instructions are
conditional jump instructions that use the value of the ECX register as a count for the
number of times to execute a loop. All the loop instructions decrement the count in
the ECX register each time they are executed and terminate a loop when zero is
reached. The LOOPE, LOOPZ, LOOPNE, and LOOPNZ instructions also accept the ZF
flag as a condition for terminating the loop before the count reaches zero.
The LOOP instruction decrements the contents of the ECX register (or the CX register,
if the address-size attribute is 16), then tests the register for the loop-termination
condition. If the count in the ECX register is non-zero, program control is transferred
to the instruction address specified by the destination operand. The destination
operand is a relative address (that is, an offset relative to the contents of the EIP
register), and it generally points to the first instruction in the block of code that is to
be executed in the loop. When the count in the ECX register reaches zero, program
control is transferred to the instruction immediately following the LOOP instruc-
tion, which terminates the loop. If the count in the ECX register is zero when the
LOOP instruction is first executed, the register is pre-decremented to FFFFFFFFH,
causing the loop to be executed 2
32
times.
The LOOPE and LOOPZ instructions perform the same operation (they are
mnemonics for the same instruction). These instructions operate the same as the
LOOP instruction, except that they also test the ZF flag.
If the count in the ECX register is not zero and the ZF flag is set, program control is
transferred to the destination operand. When the count reaches zero or the ZF flag is
clear, the loop is terminated by transferring program control to the instruction imme-
diately following the LOOPE/LOOPZ instruction.