Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

7-30 Vol. 1
PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS
The POPFD instruction pops a doubleword into the EFLAGS register. This instruction
can change the state of the AC bit (bit 18) and the ID bit (bit 21), as well as the bits
affected by a POPF instruction. The restrictions for changing the IOPL bits and the IF
flag that were given for the POPF instruction also apply to the POPFD instruction.
7.3.14.3 Interrupt Flag Instructions
The STI (set interrupt flag) and CTI (clear interrupt flag) instructions allow the inter-
rupt IF flag in the EFLAGS register to be modified directly. The IF flag controls the
servicing of hardware-generated interrupts (those received at the processor’s INTR
pin). If the IF flag is set, the processor services hardware interrupts; if the IF flag is
clear, hardware interrupts are masked.
The ability to execute these instructions depends on the operating mode of the
processor and the current privilege level (CPL) of the program or task attempting to
execute these instructions.
7.3.15 Flag Control (RFLAG) Instructions in 64-Bit Mode
In 64-bit mode, the LAHF and SAHF instructions are supported if
CPUID.80000001H:ECX.LAHF-SAHF[bit 0] = 1.
PUSHF and POPF behave the same in 64-bit mode as in non-64-bit mode. PUSHFD
always pushes 64-bit RFLAGS onto the stack (with the RF and VM flags read as clear).
POPFD always pops a 64-bit value from the top of the stack and loads the lower 32
bits into RFLAGS. It then zero extends the upper bits of RFLAGS.
7.3.16 Segment Register Instructions
The processor provides a variety of instructions that address the segment registers
of the processor directly. These instructions are only used when an operating system
or executive is using the segmented or the real-address mode memory model.
For the purpose of this discussion, these instructions are divided subordinate
subgroups of instructions that allow:
• Segment-register load and store
• Far control transfers
• Software interrupt calls
• Handling of far pointers
7.3.16.1 Segment-Register Load and Store Instructions
The MOV instruction (introduced in Section 7.3.1.1, “General Data Movement
Instructions”) and the PUSH and POP instructions (introduced in Section 7.3.1.4,
“Stack Manipulation Instructions”) can transfer 16-bit segment selectors to and from