Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 8-1
CHAPTER 8
PROGRAMMING WITH THE X87 FPU
The x87 Floating-Point Unit (FPU) provides high-performance floating-point
processing capabilities for use in graphics processing, scientific, engineering, and
business applications. It supports the floating-point, integer, and packed BCD integer
data types and the floating-point processing algorithms and exception handling
architecture defined in the IEEE Standard 754 for Binary Floating-Point Arithmetic.
This chapter describes the x87 FPU’s execution environment and instruction set. It
also provides exception handling information that is specific to the x87 FPU. Refer to
the following chapters or sections of chapters for additional information about x87
FPU instructions and floating-point operations:
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volumes
2A & 2B, provide detailed descriptions of x87 FPU instructions.
Section 4.2.2, “Floating-Point Data Types,” Section 4.2.1.2, “Signed Integers,
and Section 4.7, “BCD and Packed BCD Integers,” describe the floating-point,
integer, and BCD data types.
Section 4.9, “Overview of Floating-Point Exceptions,” Section 4.9.1, “Floating-
Point Exception Conditions,” and Section 4.9.2, “Floating-Point Exception
Priority,” give an overview of the floating-point exceptions that the x87 FPU can
detect and report.
8.1 X87 FPU EXECUTION ENVIRONMENT
The x87 FPU represents a separate execution environment within the IA-32 architec-
ture (see Figure 8-1). This execution environment consists of eight data registers
(called the x87 FPU data registers) and the following special-purpose registers:
Status register
Control register
Tag word register
Last instruction pointer register
Last data (operand) pointer register
Opcode register
These registers are described in the following sections.