Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 8-15

PROGRAMMING WITH THE X87 FPU

The fopcode compatibility mode should be enabled only when x87 FPU floating-point

exception handlers are designed to use the fopcode to analyze program performance

or restart a program after an exception has been handled.

8.1.10 Saving the x87 FPU’s State with FSTENV/FNSTENV and

FSAVE/FNSAVE

The FSTENV/FNSTENV and FSAVE/FNSAVE instructions store x87 FPU state informa-

tion in memory for use by exception handlers and other system and application soft-

ware. The FSTENV/FNSTENV instruction saves the contents of the status, control,

tag, x87 FPU instruction pointer, x87 FPU operand pointer, and opcode registers. The

FSAVE/FNSAVE instruction stores that information plus the contents of the x87 FPU

data registers. Note that the FSAVE/FNSAVE instruction also initializes the x87 FPU to

default values (just as the FINIT/FNINIT instruction does) after it has saved the orig-

inal state of the x87 FPU.

The manner in which this information is stored in memory depends on the operating

mode of the processor (protected mode or real-address mode) and on the operand-

size attribute in effect (32-bit or 16-bit). See Figures 8-9 through 8-12. In virtual-

8086 mode or SMM, the real-address mode formats shown in Figure 8-12 is used. See

Chapter 24, “System Management,” of the Intel® 64 and IA-32 Architectures Soft-

ware Developer’s Manual, Volume 3B, for information on using the x87 FPU while in

SMM.

The FLDENV and FRSTOR instructions allow x87 FPU state information to be loaded

from memory into the x87 FPU. Here, the FLDENV instruction loads only the status,

control, tag, x87 FPU instruction pointer, x87 FPU operand pointer, and opcode regis-

ters, and the FRSTOR instruction loads all the x87 FPU registers, including the x87

FPU stack registers.

Figure 8-8. Contents of x87 FPU Opcode Registers

x87 FPU Opcode Register

2nd Instruction Byte

1st Instruction Byte