Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

8-24 Vol. 1
PROGRAMMING WITH THE X87 FPU
status flags in the EFLAGS register. The condition code mnemonics are appended to
the letters “FCMOV” to form the mnemonic for a FCMOVcc instruction.
Like the CMOVcc instructions, the FCMOVcc instructions are useful for optimizing
small IF constructions. They also help eliminate branching overhead for IF operations
and the possibility of branch mispredictions by the processor.
Software can check if the FCMOVcc instructions are supported by checking the
processor’s feature information with the CPUID instruction.
8.3.4 Load Constant Instructions
The following instructions push commonly used constants onto the top [ST(0)] of the
x87 FPU register stack:
FLDZ Load +0.0
FLD1 Load +1.0
FLDPI Load π
FLDL2T Load log
2
10
FLDL2E Load log
2
e
FLDLG2 Load log
10
2
FLDLN2 Load log
e
2
The constant values have full double extended-precision floating-point precision (64
bits) and are accurate to approximately 19 decimal digits. They are stored internally
in a format more precise than double extended-precision floating point. When
loading the constant, the x87 FPU rounds the more precise internal constant
according to the RC (rounding control) field of the x87 FPU control word. The inexact-
result exception (#P) is not generated as a result of this rounding, nor is the C1 flag
Table 8-5. Floating-Point Conditional Move Instructions
Instruction Mnemonic Status Flag States Condition Description
FCMOVB CF=1Below
FCMOVNB CF=0Not below
FCMOVE ZF=1Equal
FCMOVNE ZF=0Not equal
FCMOVBE CF=1 or ZF=1 Below or equal
FCMOVNBE CF=0 or ZF=0Not below nor equal
FCMOVU PF=1 Unordered
FCMOVNU PF=0Not unordered