Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

8-26 Vol. 1
PROGRAMMING WITH THE X87 FPU
Reverse versions of the subtract (FSUBR) and divide (FDIVR) instructions enable effi-
cient coding. For example, the following options are available with the FSUB and
FSUBR instructions for operating on values in a specified x87 FPU data register ST(i)
and the ST(0) register:
FSUB:
ST(0) ← ST(0) − ST(i)
ST(i) ← ST(i) − ST(0)
FSUBR:
ST(0) ← ST(i) − ST(0)
ST(i) ← ST(0) − ST(i)
These instructions eliminate the need to exchange values between the ST(0) register
and another x87 FPU register to perform a subtraction or division.
The pop versions of the add, subtract, multiply, and divide instructions offer the
option of popping the x87 FPU register stack following the arithmetic operation.
These instructions operate on values in the ST(i) and ST(0) registers, store the result
in the ST(i) register, and pop the ST(0) register.
The FPREM instruction computes the remainder from the division of two operands in
the manner used by the Intel 8087 and Intel 287 math coprocessors; the FPREM1
instruction computes the remainder in the manner specified in IEEE Standard 754.
The FSQRT instruction computes the square root of the source operand.
The FRNDINT instruction returns a floating-point value that is the integral value
closest to the source value in the direction of the rounding mode specified in the RC
field of the x87 FPU control word.
The FABS, FCHS, and FXTRACT instructions perform convenient arithmetic opera-
tions. The FABS instruction produces the absolute value of the source operand. The
FCHS instruction changes the sign of the source operand. The FXTRACT instruction
separates the source operand into its exponent and fraction and stores each value in
a register in floating-point format.
8.3.6 Comparison and Classification Instructions
The following instructions compare or classify floating-point values:
FCOM/FCOMP/FCOMPP Compare floating point and set x87 FPU
condition code flags.
FUCOM/FUCOMP/FUCOMPP Unordered compare floating point and set
x87 FPU condition code flags.
FICOM/FICOMP Compare integer and set x87 FPU
condition code flags.
FCOMI/FCOMIP Compare floating point and set EFLAGS
status flags.
FUCOMI/FUCOMIP Unordered compare floating point and
set EFLAGS status flags.