Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

8-36 Vol. 1
PROGRAMMING WITH THE X87 FPU
8.5 X87 FPU FLOATING-POINT EXCEPTION CONDITIONS
The following sections describe the various conditions that cause a floating-point
exception to be generated by the x87 FPU and the masked response of the x87 FPU
when these conditions are detected. Intel® 64 and IA-32 Architectures Software
Developer’s Manual, Volumes 2A & 2B, list the floating-point exceptions that can be
signaled for each floating-point instruction.
See Section 4.9.2, “Floating-Point Exception Priority,” for a description of the rules for
exception precedence when more than one floating-point exception condition is
detected for an instruction.
8.5.1 Invalid Operation Exception
The floating-point invalid-operation exception occurs in response to two sub-classes of
operations:
• Stack overflow or underflow (#IS)
• Invalid arithmetic operand (#IA)
The flag for this exception (IE) is bit 0 of the x87 FPU status word, and the mask bit
(IM) is bit 0 of the x87 FPU control word. The stack fault flag (SF) of the x87 FPU
status word indicates the type of operation that caused the exception. When the SF
flag is set to 1, a stack operation has resulted in stack overflow or underflow; when
the flag is cleared to 0, an arithmetic instruction has encountered an invalid operand.
FSTSW/FNSTSW FRNDINT
WAIT/FWAIT FSCALE
FXAM FSIN
FXCH FSINCOS
FSQRT
FST/FSTP (single and double)
FSUB/FSUBP/FSUBR/FSUBRP
FTST
FUCOM/FUCOMP/FUCOMPP
FXTRACT
FYL2X/FYL2XP1
NOTE:
1. The FISTTP instruction in SSE3 is an arithmetic x87 FPU instruction.
Table 8-9. Arithmetic and Non-arithmetic Instructions (Contd.)
Non-arithmetic Instructions Arithmetic Instructions