Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

8-40 Vol. 1
PROGRAMMING WITH THE X87 FPU
8.5.3 Divide-By-Zero Exception (#Z)
The x87 FPU reports a floating-point divide-by-zero exception whenever an instruc-
tion attempts to divide a finite non-zero operand by 0. The flag (ZE) for this exception
is bit 2 of the x87 FPU status word, and the mask bit (ZM) is bit 2 of the x87 FPU
control word. The FDIV, FDIVP, FDIVR, FDIVRP, FIDIV, and FIDIVR instructions and
the other instructions that perform division internally (FYL2X and FXTRACT) can
report the divide-by-zero exception.
When a divide-by-zero exception occurs and the exception is masked, the x87 FPU
sets the ZE flag and returns the values shown in Table 8-10. If the divide-by-zero
exception is not masked, the ZE flag is set, a software exception handler is invoked
(see Section 8.7, “Handling x87 FPU Exceptions in Software”), and the top-of-stack
pointer (TOP) and source operands remain unchanged.
8.5.4 Numeric Overflow Exception (#O)
The x87 FPU reports a floating-point numeric overflow exception (#O) whenever the
rounded result of an arithmetic instruction exceeds the largest allowable finite value
that will fit into the floating-point format of the destination operand. (See Section
4.9.1.4, “Numeric Overflow Exception (#O),” for additional information about the
numeric overflow exception.)
When using the x87 FPU, numeric overflow can occur on arithmetic operations where
the result is stored in an x87 FPU data register. It can also occur on store floating-
point operations (using the FST and FSTP instructions), where a within-range value
in a data register is stored in memory in a single-precision or double-precision
floating-point format. The numeric overflow exception cannot occur when storing
values in an integer or BCD integer format. Instead, the invalid-arithmetic-operand
exception is signaled.
The flag (OE) for the numeric-overflow exception is bit 3 of the x87 FPU status word,
and the mask bit (OM) is bit 3 of the x87 FPU control word.
When a numeric-overflow exception occurs and the exception is masked, the x87
FPU sets the OE flag and returns one of the values shown in Table 4-10. The value
returned depends on the current rounding mode of the x87 FPU (see Section 8.1.5.3,
“Rounding Control Field”).
Table 8-11. Divide-By-Zero Conditions and the Masked Responses to Them
Condition Masked Response
Divide or reverse divide operation
with a 0 divisor.
Returns an ∞ signed with the exclusive OR of the sign of the
two operands to the destination operand.
FYL2X instruction. Returns an ∞ signed with the opposite sign of the non-zero
operand to the destination operand.
FXTRACT instruction. ST(1) is set to –∞; ST(0) is set to 0 with the same sign as the
source operand.