Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

8-42 Vol. 1
PROGRAMMING WITH THE X87 FPU
The flag (UE) for the numeric-underflow exception is bit 4 of the x87 FPU status
word, and the mask bit (UM) is bit 4 of the x87 FPU control word.
When a numeric-underflow condition occurs and the exception is masked, the x87
FPU performs the operation described in Section 4.9.1.5, “Numeric Underflow Excep-
tion (#U).”
When the exception is not masked, the action of the x87 FPU depends on whether the
instruction is supposed to store the result in a memory location or on the x87 FPU
resister stack.
• Destination is a memory location — (Can occur only with a store instruction.)
The UE flag is set and a software exception handler is invoked (see Section 8.7,
“Handling x87 FPU Exceptions in Software”). The top-of-stack pointer (TOP) and
source and destination operands remain unchanged, and no result is stored in
memory.
Because the data in the stack is in double extended-precision format, the
exception handler has the option either of re-exchanges the store instruction
after proper adjustment of the operand or of rounding the significand on the
stack to the destination's precision as the standard requires. The exception
handler should ultimately store a value into the destination location in memory if
the program is to continue.
• Destination is the register stack — The significand of the result is rounded
according to current settings of the precision and rounding control bits in the x87
FPU control word and the exponent of the result is adjusted by multiplying it by
2
24576
. (For instructions not affected by the precision field, the significand is
rounded to double extended precision.) The resulting value is stored in the
destination operand. Condition code bit C1 in the x87 FPU status register (acting
here as a “round-up bit”) is set if the significand was rounded upward and cleared
if the result was rounded toward 0. After the result is stored, the UE flag is set
and a software exception handler is invoked. The scaling bias value 24,576 is the
same as is used for the overflow exception and has the same effect, which is to
translate the result as nearly as possible to the middle of the double extended-
precision floating-point exponent range.
When using the FSCALE instruction, massive underflow can occur, where the
result is too tiny to be represented, even with a bias-adjusted exponent. Here, if
underflow occurs again after the result has been biased, a properly signed 0 is
stored in the destination operand.
8.5.6 Inexact-Result (Precision) Exception (#P)
The inexact-result exception (also called the precision exception) occurs if the result
of an operation is not exactly representable in the destination format. (See Section
4.9.1.6, “Inexact-Result (Precision) Exception (#P),” for additional information about
the numeric overflow exception.) Note that the transcendental instructions (FSIN,
FCOS, FSINCOS, FPTAN, FPATAN, F2XM1, FYL2X, and FYL2XP1) by nature produce
inexact results.