Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

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PROGRAMMING WITH THE X87 FPU
masked floating-point exceptions, because the x87 FPU always returns a masked
result to the destination operand.)
When a floating-point exception is unmasked and the exception condition occurs, the
x87 FPU stops further execution of the floating-point instruction and signals the
exception event. On the next occurrence of a floating-point instruction or a
WAIT/FWAIT instruction in the instruction stream, the processor checks the ES flag in
the x87 FPU status word for pending floating-point exceptions. If floating-point
exceptions are pending, the x87 FPU makes an implicit call (traps) to the floating-
point software exception handler. The exception handler can then execute recovery
procedures for selected or all floating-point exceptions.
Synchronization problems occur in the time between the moment when the excep-
tion is signaled and when it is actually handled. Because of concurrent execution,
integer or system instructions can be executed during this time. It is thus possible for
the source or destination operands for a floating-point instruction that faulted to be
overwritten in memory, making it impossible for the exception handler to analyze or
recover from the exception.
To solve this problem, an exception synchronizing instruction (either a floating-point
instruction or a WAIT/FWAIT instruction) can be placed immediately after any
floating-point instruction that might present a situation where state information
pertaining to a floating-point exception might be lost or corrupted. Floating-point
instructions that store data in memory are prime candidates for synchronization. For
example, the following three lines of code have the potential for exception synchro-
nization problems:
FILD COUNT ;Floating-point instruction
INC COUNT ;Integer instruction
FSQRT ;Subsequent floating-point instruction
In this example, the INC instruction modifies the source operand of the floating-point
instruction, FILD. If an exception is signaled during the execution of the FILD instruc-
tion, the INC instruction would be allowed to overwrite the value stored in the COUNT
memory location before the floating-point exception handler is called. With the
COUNT variable modified, the floating-point exception handler would not be able to
recover from the error.
Rearranging the instructions, as follows, so that the FSQRT instruction follows the
FILD instruction, synchronizes floating-point exception handling and eliminates the
possibility of the COUNT variable being overwritten before the floating-point excep-
tion handler is invoked.
FILD COUNT ;Floating-point instruction
FSQRT ;Subsequent floating-point instruction synchronizes
;any exceptions generated by the FILD instruction.
INC COUNT ;Integer instruction
The FSQRT instruction does not require any synchronization, because the results of
this instruction are stored in the x87 FPU data registers and will remain there, undis-
turbed, until the next floating-point or WAIT/FWAIT instruction is executed. To abso-