Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

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PROGRAMMING WITH THE X87 FPU
tion handler is provided to support the floating-point exception handling mechanism
used in PC systems that are running the MS-DOS or Windows* 95 operating system.
The MS-DOS compatibility mode is typically used as follows to invoke the floating-
point exception handler:
1. If the x87 FPU detects an unmasked floating-point exception, it sets the flag for
the exception and the ES flag in the x87 FPU status word.
2. If the IGNNE# pin is deasserted, the x87 FPU then asserts the FERR# pin either
immediately, or else delayed (deferred) until just before the execution of the next
waiting floating-point instruction or MMX instruction. Whether the FERR# pin is
asserted immediately or delayed depends on the type of processor, the
instruction, and the type of exception.
3. If a preceding floating-point instruction has set the exception flag for an
unmasked x87 FPU exception, the processor freezes just before executing the
next WAIT instruction, waiting floating-point instruction, or MMX instruction.
Whether the FERR# pin was asserted at the preceding floating-point instruction
or is just now being asserted, the freezing of the processor assures that the x87
FPU exception handler will be invoked before the new floating-point (or MMX)
instruction gets executed.
4. The FERR# pin is connected through external hardware to IRQ13 of a cascaded,
programmable interrupt controller (PIC). When the FERR# pin is asserted, the
PIC is programmed to generate an interrupt 75H.
5. The PIC asserts the INTR pin on the processor to signal the interrupt 75H.
6. The BIOS for the PC system handles the interrupt 75H by branching to the
interrupt 02H (NMI) interrupt handler.
7. The interrupt 02H handler determines if the interrupt is the result of an NMI
interrupt or a floating-point exception.
8. If a floating-point exception is detected, the interrupt 02H handler branches to
the floating-point exception handler.
If the IGNNE# pin is asserted, the processor ignores floating-point error conditions.
This pin is provided to inhibit floating-point exceptions from being generated while
the floating-point exception handler is servicing a previously signaled floating-point
exception.
Appendix D, “Guidelines for Writing x87 FPU Exception Handlers,” describes the
MS-DOS compatibility mode in much greater detail. This mode is somewhat more
complicated in the Intel486 and Pentium processor implementations, as described in
Appendix D.
8.7.3 Handling x87 FPU Exceptions in Software
Section 4.9.3, “Typical Actions of a Floating-Point Exception Handler,” shows actions
that may be carried out by a floating-point exception handler. The state of the x87