Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 9-3
PROGRAMMING WITH INTEL® MMX™ TECHNOLOGY
9.2.2 MMX Registers
The MMX register set consists of eight 64-bit registers (see Figure 9-2), that are used
to perform calculations on the MMX packed integer data types. Values in MMX regis-
ters have the same format as a 64-bit quantity in memory.
The MMX registers have two data access modes: 64-bit access mode and 32-bit
access mode. The 64-bit access mode is used for:
• 64-bit memory accesses
• 64-bit transfers between MMX registers
• All pack, logical, and arithmetic instructions
• Some unpack instructions
The 32-bit access mode is used for:
• 32-bit memory accesses
• 32-bit transfer between general-purpose registers and MMX registers
• Some unpack instructions
Although MMX registers are defined in the IA-32 architecture as separate registers,
they are aliased to the registers in the FPU data register stack (R0 through R7).
See also Section 9.5, “Compatibility with x87 FPU Architecture.”
Figure 9-2. MMX Register Set
MM7
MM6
MM5
MM4
MM3
MM2
MM1
MM0
63 0