Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

9-4 Vol. 1
PROGRAMMING WITH INTEL® MMX™ TECHNOLOGY
9.2.3 MMX Data Types
MMX technology introduced the following 64-bit data types to the IA-32 architecture
(see Figure 9-3):
64-bit packed byte integers — eight packed bytes
64-bit packed word integers — four packed words
64-bit packed doubleword integers — two packed doublewords
MMX instructions move 64-bit packed data types (packed bytes, packed words, or
packed doublewords) and the quadword data type between MMX registers and
memory or between MMX registers in 64-bit blocks. However, when performing arith-
metic or logical operations on the packed data types, MMX instructions operate in
parallel on the individual bytes, words, or doublewords contained in MMX registers
(see Section 9.2.5, “Single Instruction, Multiple Data (SIMD) Execution Model”).
9.2.4 Memory Data Formats
When stored in memory: bytes, words and doublewords in the packed data types are
stored in consecutive addresses. The least significant byte, word, or doubleword is
stored at the lowest address and the most significant byte, word, or doubleword is
stored at the high address. The ordering of bytes, words, or doublewords in memory
is always little endian. That is, the bytes with the low addresses are less significant
than the bytes with high addresses.
9.2.5 Single Instruction, Multiple Data (SIMD) Execution Model
MMX technology uses the single instruction, multiple data (SIMD) technique for
performing arithmetic and logical operations on bytes, words, or doublewords packed
into MMX registers (see Figure 9-4). For example, the PADDSW instruction adds 4
signed word integers from one source operand to 4 signed word integers in a second
source operand and stores 4 word integer results in a destination operand. This SIMD
technique speeds up software performance by allowing the same operation to be
carried out on multiple data elements in parallel. MMX technology supports parallel
Figure 9-3. Data Types Introduced with the MMX Technology
Packed Word Integers
Packed Byte Integers
Packed Doubleword Integers
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