Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

9-14 Vol. 1
PROGRAMMING WITH INTEL® MMX™ TECHNOLOGY
9.6.6 Using MMX Code in a Multitasking Operating System
Environment
An application needs to identify the nature of the multitasking operating system on
which it runs. Each task retains its own state which must be saved when a task switch
occurs. The processor state (context) consists of the general-purpose registers and
the floating-point and MMX registers.
Operating systems can be classified into two types:
Cooperative multitasking operating system
Preemptive multitasking operating system
Cooperative multitasking operating systems do not save the FPU or MMX state when
performing a context switch. Therefore, the application needs to save the relevant
state before relinquishing direct or indirect control to the operating system.
Preemptive multitasking operating systems are responsible for saving and restoring
the FPU and MMX state when performing a context switch. Therefore, the application
does not have to save or restore the FPU and MMX state.
9.6.7 Exception Handling in MMX Code
MMX instructions generate the same type of memory-access exceptions as other IA-
32 instructions (page fault, segment not present, and limit violations). Existing
exception handlers do not have to be modified to handle these types of exceptions for
MMX code.
Unless there is a pending floating-point exception, MMX instructions do not generate
numeric exceptions. Therefore, there is no need to modify existing exception
handlers or add new ones to handle numeric exceptions.
If a floating-point exception is pending, the subsequent MMX instruction generates a
numeric error exception (interrupt 16 and/or assertion of the FERR# pin). The MMX
instruction resumes execution upon return from the exception handler.
9.6.8 Register Mapping
MMX registers and their tags are mapped to physical locations of the floating-point
registers and their tags. Register aliasing and mapping is described in more detail in
Chapter 11, “Intel® MMX™ Technology System Programming,” in the Intel® 64 and
IA-32 Architectures Software Developer’s Manual, Volume 3A.