Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 11-1
CHAPTER 11
PROGRAMMING WITH
STREAMING SIMD EXTENSIONS 2 (SSE2)
The streaming SIMD extensions 2 (SSE2) were introduced into the IA-32 architecture
in the Pentium 4 and Intel Xeon processors. These extensions enhance the perfor-
mance of IA-32 processors for advanced 3-D graphics, video decoding/encoding,
speech recognition, E-commerce, Internet, scientific, and engineering applications.
This chapter describes the SSE2 extensions and provides information to assist in
writing application programs that use these and the SSE extensions.
11.1 OVERVIEW OF SSE2 EXTENSIONS
SSE2 extensions use the single instruction multiple data (SIMD) execution model
that is used with MMX technology and SSE extensions. They extend this model with
support for packed double-precision floating-point values and for 128-bit packed
integers.
If CPUID.01H:EDX.SSE2[bit 26] = 1, SSE2 extensions are present.
SSE2 extensions add the following features to the IA-32 architecture, while main-
taining backward compatibility with all existing IA-32 processors, applications and
operating systems.
• Six data types:
— 128-bit packed double-precision floating-point (two IEEE Standard 754
double-precision floating-point values packed into a double quadword)
— 128-bit packed byte integers
— 128-bit packed word integers
— 128-bit packed doubleword integers
— 128-bit packed quadword integers
• Instructions to support the additional data types and extend existing SIMD
integer operations:
— Packed and scalar double-precision floating-point instructions
— Additional 64-bit and 128-bit SIMD integer instructions
— 128-bit versions of SIMD integer instructions introduced with the MMX
technology and the SSE extensions
— Additional cacheability-control and instruction-ordering instructions