Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 11-13
PROGRAMMING WITH STREAMING SIMD EXTENSIONS 2 (SSE2)
Conversion between double-precision floating-point values and doubleword
integers — The following instructions convert operands between double-precision
floating-point and doubleword integer formats. Operands are housed in XMM regis-
ters, MMX registers, general registers or memory (at most one operand can reside in
memory; the destination is always an XMM, MMX, or general register).
The CVTPD2PI (convert packed double-precision floating-point values to packed
doubleword integers) instruction converts two packed double-precision floating-point
numbers to two packed signed doubleword integers, with the result stored in an MMX
register. When rounding to an integer value, the source value is rounded according to
the rounding mode in the MXCSR register. The CVTTPD2PI (convert with truncation
packed double-precision floating-point values to packed doubleword integers)
instruction is similar to the CVTPD2PI instruction except that truncation is used to
round a source value to an integer value (see Section 4.8.4.2, “Truncation with SSE
and SSE2 Conversion Instructions”).
The CVTPI2PD (convert packed doubleword integers to packed double-precision
floating-point values) instruction converts two packed signed doubleword integers to
two double-precision floating-point values.
Figure 11-8. SSE and SSE2 Conversion Instructions
C
V
T
P
S
2
P
I
C
V
T
T
PS
2
D
Q
C
V
T
D
Q
2
P
S
CV
T
PI2
P
S
C
V
T
P
D
2
P
S
C
VT
PS2
P
D
CV
T
P
D2
D
Q
CV
TDQ2PD
CV
T
T
P
D2
P
I
C
V
TP
I2
P
D
C
V
T
S
S
2
S
I
C
V
T
S
I
2
S
S
C
V
T
S
I
2
S
D
C
V
TT
S
D
2
S
I
C
V
T
S
D
2
S
S
C
VT
SS2
SD
C
V
T
P
S
2
D
Q
4 Doubleword
Integer
Floating-Point
Doubleword
Integer
2 Doubleword
Integer
Single-Precision
Floating Point
C
V
TS
D
2
S
I
C
V
T
P
D2
P
I
C
VT
T
PD
2
DQ
C
V
T
T
P
S
2
P
I
C
V
T
T
S
S
2
S
I
2 Doubleword
Integer
(r32/mem)
(MMX/mem)
(XMM/mem)
Double-Precision
(XMM/mem)
(XMM/mem)
(XMM/mem)