Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 C-7
FLOATING-POINT EXCEPTIONS SUMMARY
C.4 SSE2 INSTRUCTIONS
Table C-4 lists SSE2 instructions with at least one of the following characteristics:
• floating-point operands
• floating point results
For each instruction, the table summarizes the floating-point exceptions that the
instruction can generate.
Table C-4. Exceptions Generated with SSE2 Instructions
Instruction Description #I #D #Z #O #U #P
ADDPD Add two packed DP FP
numbers from XMM2/Mem to
XMM1.
YY YYY
ADDSD Add the lower DP FP number
from XMM2/Mem to XMM1.
YY YYY
ANDNPD Invert the 128 bits in
XMM1and then AND the result
with 128 bits from
XMM2/Mem.
ANDPD Logical And of 128 bits from
XMM2/Mem to XMM1 register.
CMPPD Compare packed DP FP
numbers from XMM2/Mem to
packed DP FP numbers in
XMM1 register using imm8 as
predicate.
YY
CMPSD Compare lowest DP FP number
from XMM2/Mem to lowest DP
FP number in XMM1 register
using imm8 as predicate.
YY
COMISD Compare lower DP FP number
in XMM1 register with lower
DP FP number in XMM2/Mem
and set the status flags
accordingly
YY
CVTDQ2PS Convert four 32-bit signed
integers from XMM/Mem to
four SP FP.
Y
CVTPS2DQ Convert four SP FP from
XMM/Mem to four 32-bit
signed integers in XMM using
rounding specified by MXCSR.
YY