Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

D-12 Vol. 1
GUIDELINES FOR WRITING X87 FPU EXCEPTION HANDLERS
D.3.1 Floating-Point Exceptions and Their Defaults
The x87 FPU can recognize six classes of floating-point exception conditions while
executing floating-point instructions:
1. #I — Invalid operation
#IS — Stack fault
#IA — IEEE standard invalid operation
2. #Z — Divide-by-zero
3. #D — Denormalized operand
4. #O — Numeric overflow
5. #U — Numeric underflow
6. #P — Inexact result (precision)
For complete details on these exceptions and their defaults, see Section 8.4, “x87
FPU Floating-Point Exception Handling,” and Section 8.5, “x87 FPU Floating-Point
Exception Conditions.”
D.3.2 Two Options for Handling Numeric Exceptions
Depending on options determined by the software system designer, the processor
takes one of two possible courses of action when a numeric exception occurs:
1. The x87 FPU can handle selected exceptions itself, producing a default fix-up
that is reasonable in most situations. This allows the numeric program
execution to continue undisturbed. Programs can mask individual exception
types to indicate that the x87 FPU should generate this safe, reasonable result
whenever the exception occurs. The default exception fix-up activity is treated
by the x87 FPU as part of the instruction causing the exception; no external
indication of the exception is given (except that the instruction takes longer to
execute when it handles a masked exception.) When masked exceptions are
detected, a flag is set in the numeric status register, but no information is
preserved regarding where or when it was set.
2. A software exception handler can be invoked to handle the exception. When a
numeric exception is unmasked and the exception occurs, the x87 FPU stops
further execution of the numeric instruction and causes a branch to a software
exception handler. The exception handler can then implement any sort of
recovery procedures desired for any numeric exception detectable by the x87
FPU.
D.3.2.1 Automatic Exception Handling: Using Masked Exceptions
Each of the six exception conditions described above has a corresponding flag bit in
the x87 FPU status word and a mask bit in the x87 FPU control word. If an exception