Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 D-27
GUIDELINES FOR WRITING X87 FPU EXCEPTION HANDLERS
Case #1: x87 FPU State Swap Without Numeric Exception
Assume two threads A and B, both using the floating-point unit. Let A be the thread
to have most recently executed a floating-point instruction, with no pending numeric
exceptions. Let B be the currently executing thread. CR0.TS was set when thread A
was suspended.
When B starts to execute a floating-point instruction the instruction will fault with the
DNA exception because TS is set.
At this point the handler is entered, and eventually it finds that the current x87 FPU
Owner is not the currently executing thread. To guard the x87 FPU state swap from
extraneous numeric exceptions, the x87 FPU Owner is set to be the kernel. The old
owner’s x87 FPU state is saved with FNSAVE, and the current thread’s x87 FPU state
is restored with FRSTOR. Before exiting, the x87 FPU owner is set to thread B, and
the TS bit is cleared.
On exit, thread B resumes execution of the faulting floating-point instruction and
continues.
Case #2: x87 FPU State Swap with Discarded Numeric Exception
Again, assume two threads A and B, both using the floating-point unit. Let A be the
thread to have most recently executed a floating-point instruction, but this time let
there be a pending numeric exception. Let B be the currently executing thread. When
B starts to execute a floating-point instruction the instruction will fault with the DNA
exception and enter the DNA handler. (If both numeric and DNA exceptions are
pending, the DNA exception takes precedence, in order to support handling the
numeric exception in its own context.)
When the FNSAVE starts, it will trigger an interrupt via FERR# because of the
pending numeric exception. After some system dependent delay, the numeric excep-
tion handler is entered. It may be entered before the FNSAVE starts to execute, or it
may be entered shortly after execution of the FNSAVE. Since the x87 FPU Owner is
the kernel, the numeric exception handler simply exits, discarding the exception. The
Figure D-6. Program Flow for a Numeric Exception Dispatch Routine
Numeric Exception Entry
Is Kernel
FPU Owner?
Normal Dispatch to
Numeric Exception Handler
Exit
No
Yes