Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 E-7
GUIDELINES FOR WRITING SIMD FLOATING-POINT EXCEPTION HANDLERS
“Interrupt and Exception Handling,” of Intel® 64 and IA-32 Architectures Software
Developer’s Manual, Volume 3A.
E.4.2.1 Numeric Exceptions
There are six classes of numeric (floating-point) exception conditions that can occur:
Invalid operation (#I), Divide-by-Zero (#Z), Denormal Operand (#D), Numeric
Overflow (#O), Numeric Underflow (#U), and Inexact Result (precision) (#P). #I,
#Z, #D are pre-computation exceptions (floating-point faults), detected before the
arithmetic operation. #O, #U, #P are post-computation exceptions (floating-point
traps).
Users can control how the SSE/SSE2/SSE3 floating-point exceptions are handled by
setting the mask/unmask bits in MXCSR. Masked exceptions are handled by the
processor, or by software if they are combined with unmasked exceptions occurring
in the same instruction. Unmasked exceptions are usually handled by the low-level
exception handler, in conjunction with user-level software.
E.4.2.2 Results of Operations with NaN Operands or a NaN Result for
SSE/SSE2/SSE3 Numeric Instructions
The tables below (E-1 through E-10) specify the response of SSE/SSE2/SSE3
instructions to NaN inputs, or to other inputs that lead to NaN results.
These results will be referenced by subsequent tables (e.g., E-10). Most operations
do not raise an invalid exception for quiet NaN operands, but even so, they will have
higher precedence over raising floating-point exceptions other than invalid operation.
Note that the single precision QNaN Indefinite value is 0xffc00000, the double preci-
sion QNaN Indefinite value is 0xfff8000000000000, and the Integer Indefinite value
is 0x80000000 (not a floating-point number, but it can be the result of a conversion
instruction from floating-point to integer).
For an unmasked exception, no result will be provided by the hardware to the user
handler. If a user registered floating-point exception handler is invoked, it may
provide a result for the excepting instruction, that will be used if execution of the
application code is continued after returning from the interruption.
In Tables E-1 through Table E-12, the specified operands cause an invalid exception,
unless the unmasked result is marked with “not an exception”. In this latter case, the
unmasked and masked results are the same.