Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

E-14 Vol. 1
GUIDELINES FOR WRITING SIMD FLOATING-POINT EXCEPTION HANDLERS
SQRTPS
SQRTPD
SQRTSS
SQRTSD
src = SNaN Refer to Table E-10 for
NaN operands, #IA = 1
src unchanged,
#IA = 1
src < 0
(note that -0 < 0 is false)
res = QNaN Indefinite,
#IA = 1
MAXPS
MAXSS
MAXPD
MAXSD
src1 = NaN or src2 = NaN res = src2, #IA = 1 src1, src2
unchanged; #IA =
1
MINPS
MINSS
MINPD
MINSD
src1 = NaN or src2 = NaN res = src2, #IA = 1 src1, src2
unchanged; #IA =
1
CMPPS.LT
CMPPS.LE
CMPPS.NLT
CMPPS.NLE
CMPSS.LT
CMPSS.LE
CMPSS.NLT
CMPSS.NLE
CMPPD.LT
CMPPD.LE
CMPPD.NLT
CMPPD.NLE
CMPSD.LT
CMPSD.LE
CMPSD.NLT
CMPSD.NLE
src1 = NaN or src2 = NaN Refer to Table E-4 and
Table E-5 for NaN
operands; #IA = 1
src1, src2
unchanged; #IA =
1
COMISS
COMISD
src1 = NaN or src2 = NaN Refer to Table E-6 for NaN
operands
src1, src2, EFLAGS
unchanged; #IA =
1
UCOMISS
UCOMISD
src1 = SNaN or src2 = SNaN Refer to Table E-7 for NaN
operands
src1, src2, EFLAGS
unchanged; #IA =
1
Table E-13. #I - Invalid Operations (Contd.)
Instruction Condition Masked Response
Unmasked
Response and
Exception Code