Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 E-25
GUIDELINES FOR WRITING SIMD FLOATING-POINT EXCEPTION HANDLERS
switch (exc_env->rounding_mode) {
case ROUND_TO_NEAREST:
cw = 0x003f; // round to nearest, single precision, exceptions masked
break;
case ROUND_DOWN:
cw = 0x043f; // round down, single precision, exceptions masked
break;
case ROUND_UP:
cw = 0x083f; // round up, single precision, exceptions masked
break;
case ROUND_TO_ZERO:
cw = 0x0c3f; // round to zero, single precision, exceptions masked
break;
default:
;
}
__asm {
fldcw WORD PTR cw;
}
// compute result and round to the destination precision, with
// "unbounded" exponent (first IEEE rounding)
switch (exc_env->operation) {
case ADDPS:
case ADDSS:
// perform the addition
__asm {
fnclex;
// load input operands
fld DWORD PTR uiopd1; // may set denormal or invalid status flags
fld DWORD PTR uiopd2; // may set denormal or invalid status flags
faddp st(1), st(0); // may set inexact or invalid status flags
// store result
fstp QWORD PTR dbl_res24; // exact
}
break;
case SUBPS:
case SUBSS:
// perform the subtraction
__asm {
fnclex;
// load input operands
fld DWORD PTR uiopd1; // may set denormal or invalid status flags
fld DWORD PTR uiopd2; // may set denormal or invalid status flags
fsubp st(1), st(0); // may set the inexact or invalid status flags
// store result
fstp QWORD PTR dbl_res24; // exact
}
break;