Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

INDEX
INDEX-18 Vol. 1
transcendental
, 8-31
transitions between x87 FPU and MMX code, 9-12
trigonometric, 8-29
unsupported, 8-34
x87 FPU status word
condition code flags
, 8-6
DE flag, 8-39
description of, 8-6
exception flags, 8-7
OE flag, 8-40
PE flag, 8-7
stack fault flag, 8-9
TOP field, 8-3
top of stack (TOP) pointer, 8-6
x87 FPU tag word, 8-12, 9-12
XADD instruction, 7-6
XCHG instruction, 7-5
XLAT/XLATB instruction, 7-32
XMM registers
64-bit mode
, 3-6
description, 10-4
FXSAVE and FXRSTOR instructions, 11-34
overview of, 3-3
parameters passing in, 11-34
saving on a procedure or function call, 11-34
XOR instruction, 7-14
XORPD instruction, 11-10
XORPS instruction, 10-13
Z
ZE (divide by zero exception) flag
x87 FPU status word
, 8-7, 8-40
ZE (divide by zero exception) flag bit
MXCSR register
, 11-22
Zero, floating-point format, 4-7, 4-19
ZF (zero) flag, EFLAGS register, 3-21, A-1
ZM (divide by zero exception) mask bit
MXCSR register
, 11-22
x87 FPU control word, 8-11, 8-40