Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

3-4 Vol. 1
BASIC EXECUTION ENVIRONMENT
Figure 3-1. IA-32 Basic Execution Environment for Non-64-bit Modes
0
232 -1
Eight 32-bit
32-bits
32-bits
General-Purpose Registers
Segment Registers
EFLAGS Register
EIP (Instruction Pointer Register)
Address Space*
*The address space can be
Six 16-bit
Registers
Registers
Eight 80-bit
Registers
Floating-Point
Data Registers
Eight 64-bit
Registers
MMX Registers
flat or segmented. Using
XMM Registers
Eight 128-bit
Registers
16 bits
Control Register
16 bits
Status Register
48 bits FPU Instruction Pointer Register
48 bits
FPU Data (Operand) Pointer Register
FPU Registers
MMX Registers
XMM Registers
32-bits
MXCSR Register
Opcode Register (11-bits)
Basic Program Execution Registers
16 bits Tag Register
the physical address
extension mechanism, a
physical address space of
236 - 1 can be addressed.