Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

3-14 Vol. 1
BASIC EXECUTION ENVIRONMENT
• EFLAGS (program status and control) register. The EFLAGS register report
on the status of the program being executed and allows limited (application-
program level) control of the processor.
• EIP (instruction pointer) register. The EIP register contains a 32-bit pointer
to the next instruction to be executed.
3.4.1 General-Purpose Registers
The 32-bit general-purpose registers EAX, EBX, ECX, EDX, ESI, EDI, EBP, and ESP
are provided for holding the following items:
• Operands for logical and arithmetic operations
• Operands for address calculations
• Memory pointers
Although all of these registers are available for general storage of operands, results,
and pointers, caution should be used when referencing the ESP register. The ESP
register holds the stack pointer and as a general rule should not be used for another
purpose.
Many instructions assign specific registers to hold operands. For example, string
instructions use the contents of the ECX, ESI, and EDI registers as operands. When
using a segmented memory model, some instructions assume that pointers in certain
registers are relative to specific segments. For instance, some instructions assume
that a pointer in the EBX register points to a memory location in the DS segment.