Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

3-16 Vol. 1

BASIC EXECUTION ENVIRONMENT

• ESP — Stack pointer (in the SS segment)

• EBP — Pointer to data on the stack (in the SS segment)

As shown in Figure 3-5, the lower 16 bits of the general-purpose registers map

directly to the register set found in the 8086 and Intel 286 processors and can be

referenced with the names AX, BX, CX, DX, BP, SI, DI, and SP. Each of the lower two

bytes of the EAX, EBX, ECX, and EDX registers can be referenced by the names AH,

BH, CH, and DH (high bytes) and AL, BL, CL, and DL (low bytes).

3.4.1.1 General-Purpose Registers in 64-Bit Mode

In 64-bit mode, there are 16 general purpose registers and the default operand size

is 32 bits. However, general-purpose registers are able to work with either 32-bit or

64-bit operands. If a 32-bit operand size is specified: EAX, EBX, ECX, EDX, EDI, ESI,

EBP, ESP, R8D - R15D are available. If a 64-bit operand size is specified: RAX, RBX,

RCX, RDX, RDI, RSI, RBP, RSP, R8-R15 are available. R8D-R15D/R8-R15 represent

eight new general-purpose registers. All of these registers can be accessed at the

byte, word, dword, and qword level. REX prefixes are used to generate 64-bit

operand sizes or to reference registers R8-R15.

Figure 3-5. Alternate General-Purpose Register Names

16-bit

32-bit

EAX

EBX

ECX

EDX

EBP

ESI

ESP

General-Purpose Registers

EDI