Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 3-17
BASIC EXECUTION ENVIRONMENT
In 64-bit mode, there are limitations on accessing byte registers. An instruction
cannot reference legacy high-bytes (for example: AH, BH, CH, DH) and one of the
new byte registers at the same time (for example: the low byte of the RAX register).
However, instructions may reference legacy low-bytes (for example: AL, BL, CL or
DL) and new byte registers at the same time (for example: the low byte of the R8
register, or RBP). The architecture enforces this limitation by changing high-byte
references (AH, BH, CH, DH) to low byte references (BPL, SPL, DIL, SIL: the low 8
bits for RBP, RSP, RDI and RSI) for instructions using a REX prefix.
When in 64-bit mode, operand size determines the number of valid bits in the desti-
nation general-purpose register:
• 64-bit operands generate a 64-bit result in the destination general-purpose
register.
• 32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in the
destination general-purpose register.
• 8-bit and 16-bit operands generate an 8-bit or 16-bit result. The upper 56 bits or
48 bits (respectively) of the destination general-purpose register are not be
modified by the operation. If the result of an 8-bit or 16-bit operation is intended
for 64-bit address calculation, explicitly sign-extend the register to the full
64-bits.
Because the upper 32 bits of 64-bit general-purpose registers are undefined in 32-bit
modes, the upper 32 bits of any general-purpose register are not preserved when
switching from 64-bit mode to a 32-bit mode (to protected mode or compatibility
mode). Software must not depend on these bits to maintain a value after a 64-bit to
32-bit mode switch.
3.4.2 Segment Registers
The segment registers (CS, DS, SS, ES, FS, and GS) hold 16-bit segment selectors.
A segment selector is a special pointer that identifies a segment in memory. To
access a particular segment in memory, the segment selector for that segment must
be present in the appropriate segment register.
Table 3-2. Addressable General Purpose Registers
Register Type Without REX With REX
Byte Registers AL, BL, CL, DL, AH, BH, CH,
DH
AL, BL, CL, DL, DIL, SIL, BPL, SPL,
R8L - R15L
Word Registers AX, BX, CX, DX, DI, SI, BP, SP AX, BX, CX, DX, DI, SI, BP, SP, R8W
- R15W
Doubleword Registers EAX, EBX, ECX, EDX, EDI,
ESI, EBP, ESP
EAX, EBX, ECX, EDX, EDI, ESI, EBP,
ESP, R8D - R15D
Quadword Registers N.A. RAX, RBX, RCX, RDX, RDI, RSI,
RBP, RSP, R8 - R15