Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

3-120 Vol. 2
INSTRUCTION SET REFERENCE, A-M
Operation
temp ← SRC
IF (64-Bit Mode)
THEN
IF condition TRUE
THEN
IF (OperandSize = 64)
THEN
DEST ← temp;
ELSE
DEST ← temp AND 0x00000000_FFFFFFFF;
FI;
FI;
ELSE
IF condition TRUE
THEN
DEST ← temp;
FI;
FI;
Flags Affected
None.
Protected Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register contains a NULL segment
selector.
#SS(0) If a memory operand effective address is outside the SS
segment limit.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Real-Address Mode Exceptions
#GP If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
#SS If a memory operand effective address is outside the SS
segment limit.