Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

ManualsBrandsIntel ManualsOtherIntel Pentium 4 Processor 2.80 GHz, 512K Cache, 533 MHz FSB

CONTENTS

xviii

Vol. 2A

PAGE

Table B-16. Pentium Processor Family Instruction Formats and Encodings,

Non-64-Bit Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-53

Table B-17. Pentium Processor Family Instruction Formats and Encodings, 64-Bit Mode . . . . B-53

Table B-18. Encoding of Granularity of Data Field (gg) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-54

Table B-19. MMX Instruction Formats and Encodings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-55

Table B-20. Formats and Encodings of P6 Family Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-59

Table B-21. Formats and Encodings of SSE Floating-Point Instructions. . . . . . . . . . . . . . . . . . . . . B-60

Table B-22. Formats and Encodings of SSE Integer Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . B-66

Table B-23. Format and Encoding of SSE Cacheability & Memory Ordering Instructions . . . . . B-68

Table B-24. Encoding of Granularity of Data Field (gg) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-69

Table B-25. Formats and Encodings of SSE2 Floating-Point Instructions . . . . . . . . . . . . . . . . . . . B-69

Table B-26. Formats and Encodings of SSE2 Integer Instructions . . . . . . . . . . . . . . . . . . . . . . . . . B-77

Table B-27. Format and Encoding of SSE2 Cacheability Instructions . . . . . . . . . . . . . . . . . . . . . . . B-85

Table B-28. Formats and Encodings of SSE3 Floating-Point Instructions . . . . . . . . . . . . . . . . . . . B-86

Table B-29. Formats and Encodings for SSE3 Event Management Instructions . . . . . . . . . . . . . B-87

Table B-30. Formats and Encodings for SSE3 Integer and Move Instructions . . . . . . . . . . . . . . . B-87

Table B-31. Formats and Encodings for SSSE3 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-88

Table B-32. Special Case Instructions Promoted Using REX.W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-92

Table B-33. General Floating-Point Instruction Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-96

Table B-34. Floating-Point Instruction Formats and Encodings . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-97

Table B-35. Encodings for VMX Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-102

Table C-1. Simple Intrinsics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .C-3

Table C-2. Composite Intrinsics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-15