Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

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1-2 Vol. 2

ABOUT THIS MANUAL

• Intel

Core

2 Duo processor

• Intel

Xeon

processor 5100 series

P6 family processors are IA-32 processors based on the P6 family microarchitecture.

This includes the Pentium

Pro, Pentium

II, Pentium

III, and Pentium

III Xeon

processors.

The Pentium

4, Pentium

D, and Pentium

processor Extreme Editions are based

on the Intel NetBurst

microarchitecture. Most early Intel

Xeon

processors are

based on the Intel NetBurst

microarchitecture.

The Intel

Core

Duo, Intel

Core

Solo and dual-core Intel

Xeon

processor LV

are based on an improved Pentium

M processor microarchitecture. The Intel

Xeon

processor 5100 series, Intel

Core

2 Duo, and Intel

Core

2 Extreme

processors are based on Intel

Core

microarchitecture.

P6 family, Pentium

M, Intel

Core

Solo, Intel

Core

Duo processors, dual-core

Intel

Xeon

processor LV, and early generations of Pentium 4 and Intel Xeon

processors support IA-32 architecture.

The Intel

Xeon

processor 5100 series, Intel

Core

2 Duo, Intel

Core

Extreme processors, newer generations of Pentium 4 and Intel Xeon processor family

support Intel

64 architecture.

IA-32 architecture is the instruction set architecture and programming environment

for Intel's 32-bit microprocessors.

Intel

64 architecture is the instruction set architecture and programming environ-

ment which is the superset of Intel’s 32-bit and 64-bit architectures. It is compatible

with the IA-32 architecture.

1.2 OVERVIEW OF VOLUME 2A AND 2B: INSTRUCTION

SET REFERENCE

A description of Intel® 64 and IA-32 Architectures Software Developer’s Manual,

Volumes 2A & 2B, content follows:

Chapter 1 — About This Manual. Gives an overview of all five volumes of the

Intel® 64 and IA-32 Architectures Software Developer’s Manual. It also describes

the notational conventions in these manuals and lists related Intel

manuals and

documentation of interest to programmers and hardware designers.

Chapter 2 — Instruction Format. Describes the machine-level instruction format

used for all IA-32 instructions and gives the allowable encodings of prefixes, the

operand-identifier byte (ModR/M byte), the addressing-mode specifier byte (SIB

byte), and the displacement and immediate bytes.

Chapter 3 — Instruction Set Reference, A-M. Describes IA-32 instructions in

detail, including an algorithmic description of operations, the effect on flags, the

effect of operand- and address-size attributes, and the exceptions that may be