Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

3-230 Vol. 2
INSTRUCTION SET REFERENCE, A-M
CVTSS2SD—Convert Scalar Single-Precision Floating-Point Value to
Scalar Double-Precision Floating-Point Value
Description
Converts a single-precision floating-point value in the source operand (second
operand) to a double-precision floating-point value in the destination operand (first
operand). The source operand can be an XMM register or a 32-bit memory location.
The destination operand is an XMM register. When the source operand is an XMM
register, the single-precision floating-point value is contained in the low doubleword
of the register. The result is stored in the low quadword of the destination operand,
and the high quadword is left unchanged.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
DEST[63:0] ← Convert_Single_Precision_To_Double_Precision_Floating_Point(SRC[31:0]);
(* DEST[127:64] unchanged *)
Intel C/C++ Compiler Intrinsic Equivalent
CVTSS2SD __m128d_mm_cvtss_sd(__m128d a, __m128 b)
SIMD Floating-Point Exceptions
Invalid, Denormal.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#XM If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 1.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
F3 0F 5A /r CVTSS2SD xmm1,
xmm2/m32
Valid Valid Convert one single-precision
floating-point value in xmm2/m32 to
one double-precision floating-point
value in xmm1.