Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

Vol. 2 3-353
INSTRUCTION SET REFERENCE, A-M
FNOP—No Operation
Description
Performs no FPU operation. This instruction takes up space in the instruction stream
but does not affect the FPU or machine context, except the EIP register.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
FPU Flags Affected
C0, C1, C2, C3 undefined.
Floating-Point Exceptions
None.
Protected Mode Exceptions
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#MF If there is a pending x87 FPU exception.
Real-Address Mode Exceptions
Same exceptions as in Protected Mode.
Virtual-8086 Mode Exceptions
Same exceptions as in Protected Mode.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.
64-Bit Mode Exceptions
Same exceptions as in Protected Mode.
Opcode Instruction
64-
Bit
Mode
Compat/
Leg Mode Description
D9 D0 FNOP Valid Valid No operation is performed.