Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

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INSTRUCTION SET REFERENCE, A-M

same order in which they appear in memory. Definitions of entries other than hexa-

decimal bytes are as follows:

• REX.W — Indicates the use of a REX prefix that affects operand size or

instruction semantics. The ordering of the REX prefix and other

optional/mandatory instruction prefixes are discussed Chapter 2. Note that REX

prefixes that promote legacy instructions to 64-bit behavior are not listed

explicitly in the opcode column.

• /digit — A digit between 0 and 7 indicates that the ModR/M byte of the

instruction uses only the r/m (register or memory) operand. The reg field

contains the digit that provides an extension to the instruction's opcode.

• /r — Indicates that the ModR/M byte of the instruction contains a register

operand and an r/m operand.

• cb, cw, cd, cp, co, ct — A 1-byte (cb), 2-byte (cw), 4-byte (cd), 6-byte (cp),

8-byte (co) or 10-byte (ct) value following the opcode. This value is used to

specify a code offset and possibly a new value for the code segment register.

• ib, iw, id, io — A 1-byte (ib), 2-byte (iw), 4-byte (id) or 8-byte (io) immediate

operand to the instruction that follows the opcode, ModR/M bytes or scale-

indexing bytes. The opcode determines if the operand is a signed value. All

words, doublewords and quadwords are given with the low-order byte first.

• +rb, +rw, +rd, +ro — A register code, from 0 through 7, added to the

hexadecimal byte given at the left of the plus sign to form a single opcode byte.

See Table 3-1 for the codes. The +ro columns in the table are applicable only in

64-bit mode.

• +i — A number used in floating-point instructions when one of the operands is

ST(i) from the FPU register stack. The number i (which can range from 0 to 7) is

added to the hexadecimal byte given at the left of the plus sign to form a single

opcode byte.

Table 3-1. Register Codes Associated With +rb, +rw, +rd, +ro

rb rw rd ro (64-Bit Mode only)

REX.R

Reg Field

REX.R

Reg Field

REX.R

Reg Field

REX.R

Reg Field

AL 0 0 AX 0 0 EAX 0 0 RAX 0 0

CL 0 1 CX 0 1 ECX 0 1 RCX 0 1

DL0 2DX02EDX02RDX02

BL 0 3 BX 0 3 EBX 0 3 RBX 0 3

AH No

REX

prefix

4SP No

REX

prefi

4ESP No

REX

prefix

4 N/A N/A N/A