Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

Vol. 2 3-421
INSTRUCTION SET REFERENCE, A-M
registers, XMM0 through XMM15, are saved. But the layout of the 64-bit FXSAVE map
has two flavors, depending on the value of the REX.W bit. The difference of these two
flavors is in the FPU IP and FPU DP pointers. When REX.W = 0, the FPU IP is saved as
CS with the 32 bit IP, and the FPU DP is saved as DS with the 32 bit DP. When REX.W
= 1, the FPU IP and FPU DP are both 64 bit values without and segment selectors.
The IA-32e mode save formats are shown in Table 3-51 and Table 3-52 listed below.
Table 3-51. Layout of the 64-bit-mode FXSAVE Map
with Promoted OperandSize
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FPU IP FOP FTW FSW FCW 0
MXCSR_MASK MXCSR FPU DP 16
Reserved ST0/MM0 32
Reserved ST1/MM1 48
Reserved ST2/MM2 64
Reserved ST3/MM3 80
Reserved ST4/MM4 96
Reserved ST5/MM5 112
Reserved ST6/MM6 128
Reserved ST7/MM7 144
XMM0 160
XMM1 176
XMM2 192
XMM3 208
XMM4 224
XMM5 240
XMM6 256
XMM7 272
XMM8 288
XMM9 304
XMM10 320
XMM11 336
XMM12 352
XMM13 368
XMM14 384
XMM15 400
Reserved 416
Reserved 432