Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

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INSTRUCTION SET REFERENCE, A-M
signed or unsigned. The CF and OF flags, however, cannot be used to determine if the
upper half of the result is non-zero.
In 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R
prefix permits access to additional registers (R8-R15). Use of the REX.W prefix
promotes operation to 64 bits. Use of REX.W modifies the three forms of the instruc-
tion as follows.
• One-operand form —The source operand (in a 64-bit general-purpose register
or memory location) is multiplied by the value in the RAX register and the product
is stored in the RDX:RAX registers.
• Two-operand form — The source operand is promoted to 64 bits if it is a
register or a memory location. If the source operand is an immediate, it is sign
extended to 64 bits. The destination operand is promoted to 64 bits.
• Three-operand form — The first source operand (either a register or a memory
location) and destination operand are promoted to 64 bits.
Operation
IF (NumberOfOperands = 1)
THEN IF (OperandSize
= 8)
THEN
AX ← AL ∗ SRC (* Signed multiplication *)
IF AL
= AX
THEN CF ← 0; OF ← 0;
ELSE CF ← 1; OF ← 1; FI;
ELSE IF OperandSize
= 16
THEN
DX:AX ← AX ∗ SRC (* Signed multiplication *)
IF sign_extend_to_32 (AX)
= DX:AX
THEN CF ← 0; OF ← 0;
ELSE CF ← 1; OF ← 1; FI;
ELSE IF OperandSize
= 32
THEN
EDX:EAX ← EAX ∗ SRC (* Signed multiplication *)
IF EAX
= EDX:EAX
THEN CF ← 0; OF ← 0;
ELSE CF ← 1; OF ← 1; FI;
ELSE (* OperandSize = 64 *)
RDX:RAX ← RAX ∗ SRC (* Signed multiplication *)
IF RAX
= RDX:RAX
THEN CF ← 0; OF ← 0;
ELSE CF ← 1; OF ← 1; FI;
FI;
FI;
ELSE IF (NumberOfOperands
= 2)