Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

3-8 Vol. 2

INSTRUCTION SET REFERENCE, A-M

3.1.1.7 Operation Section

The “Operation” section contains an algorithm description (frequently written in

pseudo-code) for the instruction. Algorithms are composed of the following

elements:

• Comments are enclosed within the symbol pairs “(*” and “*)”.

• Compound statements are enclosed in keywords, such as: IF, THEN, ELSE and FI

for an if statement; DO and OD for a do statement; or CASE... OF for a case

statement.

• A register name implies the contents of the register. A register name enclosed in

brackets implies the contents of the location whose address is contained in that

segment relative address is in register DI. [SI] indicates the contents of the

address contained in register SI relative to the SI register’s default segment (DS)

or the overridden segment.

• Parentheses around the “E” in a general-purpose register name, such as (E)SI,

indicates that the offset is read from the SI register if the address-size attribute

is 16, from the ESI register if the address-size attribute is 32. Parentheses

around the “R” in a general-purpose register name, (R)SI, in the presence of a

64-bit register definition such as (R)SI, indicates that the offset is read from the

64-bit RSI register if the address-size attribute is 64.

• Brackets are used for memory operands where they mean that the contents of

the memory location is a segment-relative offset. For example, [SRC] indicates

that the content of the source operand is a segment-relative offset.

• A ← B indicates that the value of B is assigned to A.

• The symbols =, ≠, >, <, ≥, and ≤ are relational operators used to compare two

values: meaning equal, not equal, greater or equal, less or equal, respectively. A

relational expression such as A ← B is TRUE if the value of A is equal to B;

otherwise it is FALSE.

• The expression “<< COUNT” and “>> COUNT” indicates that the destination

operand should be shifted left or right by the number of bits indicated by the

count operand.

The following identifiers are used in the algorithmic descriptions:

• OperandSize and AddressSize — The OperandSize identifier represents the

operand-size attribute of the instruction, which is 16, 32 or 64-bits. The

AddressSize identifier represents the address-size attribute, which is 16, 32 or

64-bits. For example, the following pseudo-code indicates that the operand-size

attribute depends on the form of the MOV instruction used.

IF Instruction ← MOVW

THEN OperandSize ← 16;

ELSE

IF Instruction ← MOVD

THEN OperandSize ← 32;