Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

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INSTRUCTION SET REFERENCE, A-M
Intel C/C++ Compiler Intrinsic Equivalent
LDDQU __m128i _mm_lddqu_si128(__m128i const *p)
Numeric Exceptions
None.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#UD If CR4.OSFXSR[bit 9] = 0.
If CR0.EM[bit 2] = 1.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Real Address Mode Exceptions
GP(0) If any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
Virtual 8086 Mode Exceptions
GP(0) If any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
#PF(fault-code) For a page fault.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.