Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

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INSTRUCTION SET REFERENCE, A-M
If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register is used to access memory and it
contains a NULL segment selector.
#SS(0) If a memory operand effective address is outside the SS
segment limit.
#PF(fault-code) If a page fault occurs.
Real-Address Mode Exceptions
#UD If source operand is not a memory location.
#GP If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
#SS If a memory operand effective address is outside the SS
segment limit.
Virtual-8086 Mode Exceptions
#UD If source operand is not a memory location.
#GP(0) The LGDT and LIDT instructions are not recognized in virtual-
8086 mode.
#GP If the current privilege level is not 0.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.
64-Bit Mode Exceptions
#SS(0) If a memory address referencing the SS segment is in a non-
canonical form.
#GP(0) If the current privilege level is not 0.
If the memory address is in a non-canonical form.
#UD If source operand is not a memory location.
#PF(fault-code) If a page fault occurs.