Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

Vol. 2 3-611
INSTRUCTION SET REFERENCE, A-M
Operation
IF (Source == m64)
THEN
(* Load instruction *)
xmm1[63:0] = m64;
xmm1[127:64] = m64;
ELSE
(* Move instruction *)
xmm1[63:0] = xmm2[63:0];
xmm1[127:64] = xmm2[63:0];
FI;
Intel C/C++ Compiler Intrinsic Equivalent
MOVDDUP __m128d _mm_movedup_pd(__m128d a)
__m128d _mm_loaddup_pd(double const * dp)
Exceptions
None
Numeric Exceptions
None
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.