Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

Vol. 2 3-619
INSTRUCTION SET REFERENCE, A-M
MOVHLPS— Move Packed Single-Precision Floating-Point Values High
to Low
Description
Moves two packed single-precision floating-point values from the high quadword of
the source operand (second operand) to the low quadword of the destination
operand (first operand). The high quadword of the destination operand is left
unchanged.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
DEST[63:0] ← SRC[127:64];
(* DEST[127:64] unchanged *)
Intel C/C++ Compiler Intrinsic Equivalent
MOVHLPS __m128 _mm_movehl_ps(__m128 a, __m128 b)
SIMD Floating-Point Exceptions
None.
Protected Mode Exceptions
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:EDX.SSE[bit 25] = 0.
Real Address Mode Exceptions
Same exceptions as in Protected Mode.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
OF 12 /r MOVHLPS xmm1,
xmm2
Valid Valid Move two packed single-
precision floating-point values
from high quadword of xmm2
to low quadword of xmm1.