Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

Vol. 2 3-667
INSTRUCTION SET REFERENCE, A-M
Real Address Mode Exceptions
GP(0) If any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH.
If memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#NM If CR0.TS[bit 3] = 1.If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
Virtual 8086 Mode Exceptions
GP(0) If any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH.
If memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
#PF(fault-code) For a page fault.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.
64-Bit Mode Exceptions
#SS(0) If a memory address referencing the SS segment is in a non-
canonical form.
#GP(0) If the memory address is in a non-canonical form.
If memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.SSE3(ECX, bit 0) is 0.