Intel 64 and IA-32 Architectures Software Developers Manual Volume 2A, Instruction Set Reference, A-M

Vol. 2 3-699
INSTRUCTION SET REFERENCE, A-M
MWAIT EAX, ECX
}
}
The above code sequence makes sure that a triggering store does not happen
between the first check of the trigger and the execution of the monitor instruction.
Without the second check that triggering store would go un-noticed. Typical usage of
MONITOR and MWAIT would have the above code sequence within a loop.
Numeric Exceptions
None.
Protected Mode Exceptions
#GP(0) If ECX ≠ 0 and CPUID.05H.ECX[0] = 0.
#UD If CPUID.01H:ECX.MONITOR[bit 3] = 0.
If executed at privilege level 1 through 3 when the instruction is
not available.
If LOCK prefixes are used.
If REPE, REPNE or operand size prefixes are used.
Real Address Mode Exceptions
#GP(0) For ECX ≠ 0 and CPUID.05H.ECX[0] = 0.
#UD If CPUID.01H:ECX.MONITOR[bit 3] = 0.
If LOCK prefix is used.
If REPE, REPNE or operand size prefixes are used.
Virtual 8086 Mode Exceptions
#GP(0) For ≠ 0 and CPUID.05H.ECX[0] = 0.
#UD If CPUID.01H:ECX.MONITOR[bit 3] = 0; or the instruction is
executed at privilege level 1-2-3 when the instruction is not
available.
If LOCK prefix is used.
If REPE, REPNE or operand size prefixes are used.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.