Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 5-25
INTERRUPT AND EXCEPTION HANDLING
5.14.2 64-Bit Mode Stack Frame
In legacy mode, the size of an IDT entry (16 bits or 32 bits) determines the size of
interrupt-stack-frame pushes. SS:ESP is pushed only on a CPL change. In 64-bit
mode, the size of interrupt stack-frame pushes is fixed at eight bytes. This is because
only 64-bit mode gates can be referenced. 64-bit mode also pushes SS:RSP uncon-
ditionally, rather than only on a CPL change.
Aside from error codes, pushing SS:RSP unconditionally presents operating systems
with a consistent interrupt-stackframe size across all interrupts. Interrupt service-
routine entry points that handle interrupts generated by the INTn instruction or
external INTR# signal can push an additional error code place-holder to maintain
consistency.
In legacy mode, the stack pointer may be at any alignment when an interrupt or
exception causes a stack frame to be pushed. This causes the stack frame and
succeeding pushes done by an interrupt handler to be at arbitrary alignments. In IA-
32e mode, the RSP is aligned to a 16-byte boundary before pushing the stack frame.
The stack frame itself is aligned on a 16-byte boundary when the interrupt handler is
called. The processor can arbitrarily realign the new RSP on interrupts because the
previous (possibly unaligned) RSP is unconditionally saved on the newly aligned
stack. The previous RSP will be automatically restored by a subsequent IRET.
Aligning the stack permits exception and interrupt frames to be aligned on a 16-byte
boundary before interrupts are re-enabled. This allows the stack to be formatted for
optimal storage of 16-byte XMM registers, which enables the interrupt handler to use
faster 16-byte aligned loads and stores (MOVAPS rather than MOVUPS) to save and
restore XMM registers.
Although the RSP alignment is always performed when LMA = 1, it is only of conse-
quence for the kernel-mode case where there is no stack switch or IST used. For a
stack switch or IST, the OS would have presumably put suitably aligned RSP values in
the TSS.
5.14.3 IRET in IA-32e Mode
In IA-32e mode, IRET executes with an 8-byte operand size. There is nothing that
forces this requirement. The stack is formatted in such a way that for actions where
IRET is required, the 8-byte IRET operand size works correctly.
Because interrupt stack-frame pushes are always eight bytes in IA-32e mode, an
IRET must pop eight byte items off the stack. This is accomplished by preceding the
IRET with a 64-bit operand-size prefix. The size of the pop is determined by the
address size of the instruction. The SS/ESP/RSP size adjustment is determined by
the stack size.
IRET pops SS:RSP unconditionally off the interrupt stack frame only when it is
executed in 64-bit mode. In compatibility mode, IRET pops SS:RSP off the stack only
if there is a CPL change. This allows legacy applications to execute properly in
compatibility mode when using the IRET instruction. 64-bit interrupt service routines