Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 5-45
INTERRUPT AND EXCEPTION HANDLING
Exception Error Code
An error code containing the segment selector index for the segment descriptor that
caused the violation is pushed onto the stack of the exception handler. If the EXT flag
is set, it indicates that the exception was caused by an event external to the currently
running program (for example, if an external interrupt handler using a task gate
attempted a task switch to an invalid TSS).
Saved Instruction Pointer
If the exception condition was detected before the task switch was carried out, the
saved contents of CS and EIP registers point to the instruction that invoked the task
switch. If the exception condition was detected after the task switch was carried out,
the saved contents of CS and EIP registers point to the first instruction of the new
task.
Program State Change
The ability of the invalid-TSS handler to recover from the fault depends on the error
condition than causes the fault. See Section 6.3, “Task Switching,” for more informa-
tion on the task switch process and the possible recovery actions that can be taken.
If an invalid TSS exception occurs during a task switch, it can occur before or after
the commit-to-new-task point. If it occurs before the commit point, no program
state change occurs. If it occurs after the commit point (when the segment
descriptor information for the new segment selectors have been loaded in the
segment registers), the processor will load all the state information from the new
TSS before it generates the exception. During a task switch, the processor first loads
all the segment registers with segment selectors from the TSS, then checks their
contents for validity. If an invalid TSS exception is discovered, the remaining
segment registers are loaded but not checked for validity and therefore may not be
usable for referencing memory. The invalid TSS handler should not rely on being
able to use the segment selectors found in the CS, SS, DS, ES, FS, and GS registers
without causing another exception. The exception handler should load all segment
registers before trying to resume the new task; otherwise, general-protection
exceptions (#GP) may result later under conditions that make diagnosis more diffi-
cult. The Intel recommended way of dealing situation is to use a task for the invalid
TSS exception handler. The task switch back to the interrupted task from the invalid-
TSS exception-handler task will then cause the processor to check the registers as it
loads them from the TSS.