Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

7-16 Vol. 3A
MULTIPLE-PROCESSOR MANAGEMENT
multiple-processor systems. (Here, multiple processors is defined as two or more
processors.) The MP initialization protocol has the following important features:
• It supports controlled booting of multiple processors without requiring dedicated
system hardware.
• It allows hardware to initiate the booting of a system without the need for a
dedicated signal or a predefined boot processor.
• It allows all IA-32 processors to be booted in the same manner, including those
supporting Hyper-Threading Technology.
• The MP initialization protocol also applies to MP systems using Intel 64
processors.
The mechanism for carrying out the MP initialization protocol differs depending on
the IA-32 processor family, as follows:
• For P6 family processors — The selection of the BSP and APs (see Section
7.5.1, “BSP and AP Processors”) is handled through arbitration on the APIC bus,
using BIPI and FIPI messages. See Appendix C, “MP Initialization For P6 Family
Processors,” for a complete discussion of MP initialization for P6 family
processors.
• Intel Xeon processors with family, model, and stepping IDs up to F09H —
The selection of the BSP and APs (see Section 7.5.1, “BSP and AP Processors”) is
handled through arbitration on the system bus, using BIPI and FIPI messages
(see Section 7.5.3, “MP Initialization Protocol Algorithm for
Intel Xeon Processors”).
• Intel Xeon processors with family, model, and stepping IDs of F0AH and
beyond, 6E0H and beyond, 6F0H and beyond — The selection of the BSP and
APs is handled through a special system bus cycle, without using BIPI and FIPI
message arbitration (see Section 7.5.3, “MP Initialization Protocol Algorithm for
Intel Xeon Processors”).
The family, model, and stepping ID for a processor is given in the EAX register when
the CPUID instruction is executed with a value of 1 in the EAX register.
7.5.1 BSP and AP Processors
The MP initialization protocol defines two classes of processors: the bootstrap
processor (BSP) and the application processors (APs). Following a power-up or
RESET of an MP system, system hardware dynamically selects one of the processors
on the system bus as the BSP. The remaining processors are designated as APs.
As part of the BSP selection mechanism, the BSP flag is set in the IA32_APIC_BASE
MSR (see Figure 8-5) of the BSP, indicating that it is the BSP. This flag is cleared for
all other processors.
The BSP executes the BIOS’s boot-strap code to configure the APIC environment,
sets up system-wide data structures, and starts and initializes the APs. When the BSP