Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

7-20 Vol. 3A
MULTIPLE-PROCESSOR MANAGEMENT
2. Loads the microcode update into the processor.
3. Initializes the MTRRs.
4. Enables the caches.
5. Executes the CPUID instruction with a value of 0H in the EAX register, then reads
the EBX, ECX, and EDX registers to determine if the BSP is “GenuineIntel.”
6. Executes the CPUID instruction with a value of 1H in the EAX register, then saves
the values in the EAX, ECX, and EDX registers in a system configuration space in
RAM for use later.
7. Loads start-up code for the AP to execute into a 4-KByte page in the lower 1
MByte of memory.
8. Switches to protected mode and insures that the APIC address space is mapped
to the strong uncacheable (UC) memory type.
9. Determine the BSP’s APIC ID from the local APIC ID register (default is 0):
MOV ESI, APIC_ID; Address of local APIC ID register
MOV EAX, [ESI];
AND EAX, 0FF000000H; Zero out all other bits except APIC ID
MOV BOOT_ID, EAX; Save in memory
Saves the APIC ID in the ACPI and MP tables and optionally in the system
configuration space in RAM.
10. Converts the base address of the 4-KByte page for the AP’s bootup code into 8-bit
vector. The 8-bit vector defines the address of a 4-KByte page in the real-address
mode address space (1-MByte space). For example, a vector of 0BDH specifies a
start-up memory address of 000BD000H.
11. Enables the local APIC by setting bit 8 of the APIC spurious vector register (SVR).
MOV ESI, SVR; Address of SVR
MOV EAX, [ESI];
OR EAX, APIC_ENABLED; Set bit 8 to enable (0 on reset)
MOV [ESI], EAX;
12. Sets up the LVT error handling entry by establishing an 8-bit vector for the APIC
error handler.
MOV ESI, LVT3;
MOV EAX, [ESI];
AND EAX, FFFFFF00H; Clear out previous vector.
OR EAX, 000000xxH; xx is the 8-bit vector the APIC error handler.
MOV [ESI], EAX;
13. Initializes the Lock Semaphore variable VACANT to 00H. The APs use this
semaphore to determine the order in which they execute BIOS AP initialization
code.