Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

7-24 Vol. 3A
MULTIPLE-PROCESSOR MANAGEMENT
For P6 family processors, the APIC ID that is assigned to a processor during power-
up and initialization is 4 bits (see Figure 7-2). Here, bits 0 and 1 form a 2-bit
processor (or socket) identifier and bits 2 and 3 form a 2-bit cluster ID.
7.6 HYPER-THREADING AND MULTI-CORE TECHNOLOGY
Hyper-Threading Technology and multi-core technology are extensions to Intel 64
and IA-32 architectures that enable a single physical processor to execute two or
more separate code streams (called threads) concurrently. In Hyper-Threading Tech-
nology, a single processor core provides two logical processors that share execution
resources (see Section 7.8, “Intel
®
Hyper-Threading Technology Architecture”). In
multi-core technology, a physical processor package provides two or more processor
cores. Both configurations require chipsets and a BIOS that support the technolo-
gies.
Software should not rely on processor names to determine whether a processor
supports Hyper-Threading Technology or multi-core technology. Use the CPUID
instruction to determine processor capability (see Section 7.7.2, “Initializing Dual-
Core Processors”).
7.7 DETECTING HARDWARE MULTI-THREADING
SUPPORT AND TOPOLOGY
Use the CPUID instruction to detect the presence of hardware multi-threading
support in a physical processor. The following can be interpreted:
• Hardware Multi-Threading feature flag (CPUID.1:EDX[28] = 1) —
Indicates when set that the physical package is capable of supporting Hyper-
Threading Technology and/or multiple cores.
• Logical processors per Package (CPUID.1:EBX[23:16]) — Indicates the
maximum number of logical processors in a physical package. This represents
the hardware capability as the processor has been manufactured.
1
• Cores per Package
2
(CPUID.(EAX=4, ECX=0
3
):EAX[31:26] + 1 = Y) —
Indicates the maximum number of processor cores (Y) in the physical package
1. Operating system and BIOS may implement features that reduce the number of logical proces-
sors available in a platform to applications at runtime to less than the number of physical pack-
ages times the number of hardware-capable logical processors per package.
2. Software must check CPUID for its support of leaf 4 when implementing support for multi-core. If
CPUID leaf 4 is not available at runtime, software should handle the situation as if there is only
one core per package.
3. Maximum number of cores in the physical package must be queried by executing CPUID with EAX
=4 and a valid ECX input value. Valid ECX input values start from 0.