Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1
7-26 Vol. 3A
MULTIPLE-PROCESSOR MANAGEMENT
7.7.3 Executing Multiple Threads on an Intel
®
64 or IA-32
Processor Supporting Hardware Multi-Threading
Upon completing the operating system boot-up procedure, the bootstrap processor
(BSP) executes operating system code. Other logical processors are placed in the
halt state. To execute a code stream (thread) on a halted logical processor, the oper-
ating system issues an interprocessor interrupt (IPI) addressed to the halted logical
processor. In response to the IPI, the processor wakes up and begins executing the
thread identified by the interrupt vector received as part of the IPI.
To manage execution of multiple threads on logical processors, an operating system
can use conventional symmetric multiprocessing (SMP) techniques. For example, the
operating-system can use a time-slice or load balancing mechanism to periodically
interrupt each of the active logical processors. Upon interrupting a logical processor,
the operating system checks its run queue for a thread waiting to be executed and
dispatches the thread to the interrupted logical processor.
7.7. 4 H a nd lin g Int errupt s on an IA-32 Processor Supporting
Hardware Multi-Threading
Interrupts are handled on processors supporting Hyper-Threading Technology as
they are on conventional MP systems. External interrupts are received by the I/O
APIC, which distributes them as interrupt messages to specific logical processors
(see Figure 7-3).
Logical processors can also send IPIs to other logical processors by writing to the ICR
register of its local APIC (see Section 8.6, “Issuing Interprocessor Interrupts”). This
also applies to dual-core processors.