Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 7-55
MULTIPLE-PROCESSOR MANAGEMENT
} ELSE {
// No work to do - wait in appropriate C-state handler depending
// on Idle time accumulated
IF (IdleTime >= IdleTimeThreshhold) THEN {
// Call appropriate C1, C2, C3 state handler, C1
// handler shown below
}
}
}
// C1 handler uses a Halt instruction
VOID C1Handler()
{
MONITOR WorkQueue // Setup of eax with WorkQueue LinearAddress,
// ECX, EDX = 0
IF (WorkQueue != 0) THEN {
STI
MWAIT // EAX, ECX = 0
}
}
7.11.6.5 Guidelines for Scheduling Threads on Logical Processors Sharing
Execution Resources
Because the logical processors, the order in which threads are dispatched to logical
processors for execution can affect the overall efficiency of a system. The following
guidelines are recommended for scheduling threads for execution.
• Dispatch threads to one logical processor per processor core before dispatching
threads to the other logical processor sharing execution resources in the same
processor core.
• In an MP system with two or more physical packages, distribute threads out over
all the physical processors, rather than concentrate them in one or two physical
processors.
• Use processor affinity to assign a thread to a specific processor core or package,
depending on the cache-sharing topology. The practice increases the chance that
the processor’s caches will contain some of the thread’s code and data when it is
dispatched for execution after being suspended.
7.11.6.6 Eliminate Execution-Based Timing Loops
Intel discourages the use of timing loops that depend on a processor’s execution
speed to measure time. There are several reasons: